The present invention relates generally to systems and methods for monitoring and testing various modules in an electronic system, such as a computer system. More particularly, the invention provides methods and systems for enabling programmable, integrated margin testing of a computer system.
Electronic systems often include a myriad of subsystems and components that require monitoring and/or testing during development and/or manufacturing while in use in the field to ensure their proper operation within specified operating conditions. Many of these components typically exhibit subtle failures at margins or extremes of such specified operating conditions. Hence, it is desirable to test a system to variations of operating conditions, such as, ambient temperature, clock frequencies and power rail voltages, associated with selected components thereof, during development and manufacturing, to ensure system reliability. Such testing of a system, especially at the extremes or margins of the operating conditions, is herein referred to as margin testing. Margin testing can also ensure that a particular design can be readily adapted to evolving changes in manufacturing processes.
Traditionally, circuitry for margin testing is implemented by providing a plurality of access points in a system under test (SUT) that allow external adjustment of the system's power rail voltages, and input of alternate wave functions for distribution to the system's fundamental clock networks. Such traditional approaches, however, suffer from a number of shortcomings. For example, such approaches typically require physical modification of the SUT, e.g., physical switching of various components for selecting different frequencies, that may lead to accidental damage and/or unreliable test results. Further, such approaches typically require multiple manufacturing “load-options” to bypass the system's integral fault trigger circuits during testing, and additional ports for providing feedback to an external test system, thereby adding to the complexity and expense of margin testing.
Moreover, external test systems can be expensive, and are often large and utilize valuable floor space. In addition, such external test systems require control software to manage, monitor and control analog/digital function generators, thereby adding complexity to the process of synchronizing the SUT's operation with specific control inputs issued by the external test system. Moreover, the use of an external test system can render generation and testing of scripts for margin testing more complicated. In particular, test scripts must execute additional control commands to interface with the test station, e.g., the test system's generators that provide various stimuli to the SUT.
Another disadvantage of such traditional margin testing systems relates to a high level of hardware specificity that causes such systems to be generally non-extensible. For example, in such traditional margin testing systems, the processes and procedures utilized for margin testing of a present SUT can not be readily extended to processes and procedures suitable for margin testing of a future version of the SUT.
Hence, there is a need for enhanced systems and methods for readily performing margin testing of a computer system. There is also a need for such systems and methods that allow margin testing without a need for physical modifications of the system under test.